Hierarchical Transfer Learning for Cycle Time Forecasting for Semiconductor Wafer Lot under Different Work in Process Levels

The accurate cycle time (CT) prediction of the wafer fabrication remains a tough task, as system level work in process (WIP) is fluctuant. Aiming to construct one unified CT forecasting model under dynamic WIP levels, this paper proposes transfer learning method for finetuning predicted neural network hierarchically. First, two-dimensional (2D) convolutional was constructed predict primary with input spatial-temporal characteristics by reorganizing parameters. Then, another level, hierarchical optimization strategy designed finetune so improve accuracy forecasting. experimental results demonstrated that hierarchically approach outperforms compared methods fluctuation levels.